A Thin Film Transistor Liquid Crystal Display (TFT-LCD) has advantages such as small size, low power consumption and zero radiation, and therefore is prevailing in the market of flat panel display nowadays. The main structure of the TFT-LCD includes an array substrate and a color filter substrate that are oppositely arranged to form a cell, so as to fill a liquid crystal molecule layer between the array substrate and the color filter substrate. The conventional TFT mainly includes an oxide semiconductor TFT (also called oxide TFT) and an amorphous silicon TFT. The oxide TFT is more preferable for manufacturing high-end display products with high resolution (high definition) and high refresh rate (smoother motion graphics), because the oxide TFT has characteristics of greater on-off ratio (i.e. when it is turned on, the current is larger, and the duration for charging is shorter; and when it is turned off, the drain current is smaller, and it is anti-creep).
FIG. 1 is a schematic view of a structure of an oxide TFT array substrate in related art. Herein the oxide TFTs each is of a simple structure of back channel etching (BCE), which includes, from bottom to top, a gate electrode 2, a gate isolation layer 7, a pattern 5 of an oxide semiconductor layer, a source electrode 3, a drain electrode 4, and a protection layer 8 coated thereon, wherein the source electrode 3 and the drain electrode 4 are interfaced with the pattern 5 of the oxide semiconductor layer, and a channel region resides between the source electrode 3 and the drain electrode 4 in the pattern 5 of the oxide semiconductor layer. When the TFTs each is turned on, a conductive channel of the TFT is formed by the channel region in the pattern 5 of the oxide semiconductor layer. Such TFTs are simpler in manufacturing and smaller in size, and a parasitic capacitor therewith is also smaller. However, after forming the pattern 5 of the oxide semiconductor layer, a film is formed by a source-drain metal, and then a photoresist is coated, and the exposing and the developing processes are implemented. When etching the source-drain metal, it is necessary to etch off the source-drain metal between the source electrode 3 and the drain electrode 4, while the etching liquid may significantly corrode the channel region in the pattern 5 of the oxide semiconductor layer. It is proposed a following solution to this problem.
FIG. 2 is a schematic view of another structure of an oxide TFT array substrate in related art. Here the oxide TFT includes, from bottom to top, a gate electrode 2, a gate isolation layer 7, a pattern 5 of an oxide semiconductor layer, a etch stop layer (ESL) 9, via holes of the etch stop layer, a source electrode 3, a drain electrode 4, and a protection layer 8 coated thereon, wherein the source electrode 3 and the drain electrode 4 are interfaced with the pattern 5 of the oxide semiconductor layer by the via holes of the etch stop layer, and a channel region is arranged between the source electrode 3 and the drain electrode 4 in the pattern 5 of the oxide semiconductor layer. When the TFTs each is turned on, a conductive channel of the TFT is formed by the channel region in the pattern 5 of the oxide semiconductor layer. Thus, during the process of forming the source electrode 3 and the drain electrode 4 by an etching process, the etch stop layer 9 may prevent the channel region in the pattern 5 of the oxide semiconductor layer from being etched. However, although such TFTs may prevent the channel region in the pattern 5 of the oxide semiconductor layer from being etched during the process of forming the source electrode 3 and the drain electrode 4, such TFTs are complex in manufacturing and big in size due to the incorporation of the etch stop layer 9. Furthermore, it is introduced a parasitic capacitor between the source electrode 3, the drain electrode 4 and the pattern 5 of the oxide semiconductor layer.